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THE ROLE:

As a technical lead in Circuit Technologies power solutions, you will be responsible for architecture and high level modelling, and simulation, of power Ips from silicon level to SOC to package and board. You will also be the IP interface to test, high volume manufacturing, and business unit with respect to both analog and digital functionality of power Ips. You will be expected to work with the IP analog engineers, SOC design team, process, packaging and systems engineers to ensure the design and modelling of the IP meets expectations and the performance metrics.

THE PERSON:

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. Are you looking to take on and tackle advanced engineering challenges? We are looking for open minded, flexible, innovative, and creative Engineers looking to join a new team to develop power subsystems. Are you looking for a ground floor opportunity that requires being a self-starter and the ability to independently drive tasks to completion? We are also looking for strong interpersonal and communication skills - this position will be working collaboratively across the AMD organization! If this sounds like you, please apply!

KEY RESPONSIBILITIES:

Some of the expected responsibilities of the candidate will include:

• System level modelling of power Ips, in time and frequency domain, using the models to predict post silicon performance against key metrics.
• Working with designers in silicon and package and ensure power routing is done to guarantee performance
• Supply noise analysis at a package and board level and working with analog IP designers
• Working with architects in power IP and SOC on features and circuits to maximize performance
• Generation and simulation of system level modelling of blocks with Verilog equivalents to ensure logical functionality
• Guiding layout of IC design and package

Candidate will work in a small team with other analog engineers, system and package designers and layout engineers to ensure successful productization of power IPs.

PREFERRED EXPERIENCE:

• Proven technical understanding of power supply architectures and PDN in products
• Understanding and experience with power topologies
• Working knowledge of 2D/2.5D extraction and power simulation tools
• Understanding of power IP test and characterization flows
• Ability to work with multiple cross functional teams to make the right trade-offs on system level performance
• Basic knowledge of power IP control theory
• Experience with high level and architectural modelling of power Ips.
• Must have good written and verbal communication skills
• Basic understanding of typical SOC power management flows and power partitioning and high volume testing of power IPs

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in related discipline preferred.

LOCATION: Rochester, NY

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At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.